Method of generating test sequence and apparatus for generating test sequence

摘要

In a method of generating a test sequence for testing a stuck- at fault supposed in a sequential circuit as a test circuit, the number of flip- flops which can be replaced with scan flip-flops among flip- flops included in the circuit under test is initially specified in the first step. Next, in the second step, there is calculated, for each of the flip- flops included in the circuit under test, the sequential depth of a clock defined as the minimum number of flip-flops that are passed through while the input side from the clock input terminal of the flip- flop is traced until an external input pin is reached. In the third step, flip-flops are identified with scan flip-flops by the number specified in the first step in the order of decreasing sequential depth of a clock, which was calculated in the second step.