Voltage-variable biased inverting limiter for RFI suppression overview

摘要

An enhanced nonlinear processor for RFI suppression uses a biased inverting limiter circuit. There are two parallel paths in the device; the first one is used to estimate the intensity of the RFI signal, the second one is used to process the signal. The first signal path employs an envelope detector and filter (to estimate RFI intensity) followed by a comparator circuit to avoid use of the processing if the RFI is too small; the second path has a biased inverting limiter whose characteristic is controlled by the output of the first path. When the estimate of the RFI intensity is close to being correct, the biased inverting limiter traps the large RFI signal, converting it into a higher order harmonic which is filtered out. The wanted signal is not trapped, but instead sees an "effective" positive gain which allows it to pass through unaffected except for a gain factor. The net result is a reduction in the ratio of unwanted signal to wanted signal.