首页>
外国专利>
Virtual to logical to physical address translation for distributed memory massively parallel processing systems
Virtual to logical to physical address translation for distributed memory massively parallel processing systems
展开▼
机译:从虚拟到逻辑到物理地址的转换,用于分布式内存大规模并行处理系统
展开▼
页面导航
摘要
著录项
相似文献
摘要
Address translation means for distributed memory massively parallel processing (MPP) systems include means for defining virtual addresses for processing elements (PE's) and memory relative to a partition of PE's under program control, means for defining logical addresses for PE's and memory within a three-dimensional interconnected network of PE's in the MPP, and physical addresses for PE's and memory corresponding to identities and locations of PE modules within computer cabinetry. As physical PE's are mapped into or out of the logical MPP, as spares are needed, logical addresses are updated. Address references generated by a PE within a partition in virtual address mode are converted to logical addresses and physical addresses for routing on the network.
展开▼