Digital signal recording and/or reproducing apparatus having a phase- locked loop for generating a clock signal from recording signals during a recording operation and reproducing signal during a reproducing operation and a method thereof

摘要

An apparatus and method for recording and/or reproducing a digital signal. An input digital signal is received and processed by a recording processing device so as to form a recording signal. The recording signal may be recorded onto and reproduced from a recording medium. The reproduced signal may be processed by a reproducing processing device so as to form an output signal. Processing performed by the reproducing processing device may be controlled by a clock signal provided by a phase- locked loop (PLL) circuit. The PLL circuit respectively receives the recording and reproduced signals when the apparatus is operating in a recording mode and a reproducing mode, and generates the clock signal therefrom. Alternatively, instead of the recording signal, the PLL circuit may receive a leakage current when the apparatus is operating in the recording mode. In this latter situation, the PLL circuit generates the clock signal from the leakage current and the reproduced signal. As a result, signals may be satisfactorily reproduced and processed even after operations (such as after-recording operations) wherein reproduced signals are unavailable for supply to the PLL circuit are completed.