首页> 外国专利> LOW POWER CONSUMPTION BUS STRUCTURE AND METHOD FOR CONTROLLING THE SAME AND SYSTEM FOR SYNTHESIZING LOW POWER CONSUMPTION BUS STRUCTURE AND METHOD THEREFOR AND PORTABLE INFORMATION EQUIPMENT

LOW POWER CONSUMPTION BUS STRUCTURE AND METHOD FOR CONTROLLING THE SAME AND SYSTEM FOR SYNTHESIZING LOW POWER CONSUMPTION BUS STRUCTURE AND METHOD THEREFOR AND PORTABLE INFORMATION EQUIPMENT

机译:低功耗总线结构及其控制方法,系统以及低功耗总线结构的综合方法,参考和便携式信息设备

摘要

PROBLEM TO BE SOLVED: To provide a low power consumption bus structure in which low power consumption and the high speed of data transfer can be realized. SOLUTION: Plural functioning blocks 1, 3, 5 and 7 arranged on an LSI chip are connected, and a bus 9 to be used for data transfer between each functioning block is divided into plural sub-sections 9a, 9b and 9c, and the set of functioning blocks whose data transferring speed is high, for example, the functioning blocks 1 and 7 are connected with the same sub-section 9b. Moreover, connecting means 29 and 31 for arbitrarily electrically connecting or disconnecting the divided sub-sections are provided between each divided sub-section. Then, at the time of operating data transfer between the functioning blocks whose data transfer frequency is high, the sub-sections with which they are connected are electrically disconnected from the other sub-section by the connecting means.
机译:要解决的问题:提供一种低功耗总线结构,其中可以实现低功耗和高速数据传输。解决方案:连接布置在LSI芯片上的多个功能块1、3、5和7,并且用于在每个功能块之间进行数据传输的总线9分为多个子部分9a,9b和9c,并且在数据传输速度高的功能块中,例如,功能块1和7与相同的子部分9b连接。此外,在每个分割子部分之间设置有用于任意地电连接或断开分割子部分的连接装置29和31。然后,在数据传输频率高的功能块之间进行数据传输的操作时,通过连接装置将它们所连接的子部分与另一子部分电断开。

著录项

  • 公开/公告号JPH1173258A

    专利类型

  • 公开/公告日1999-03-16

    原文格式PDF

  • 申请/专利权人 TOSHIBA CORP;

    申请/专利号JP19970232965

  • 发明设计人 USAMI MASAYOSHI;

    申请日1997-08-28

  • 分类号G06F3/00;H01L21/82;H01L27/04;H01L21/822;

  • 国家 JP

  • 入库时间 2022-08-22 02:35:05

相似文献

  • 专利
  • 外文文献
  • 中文文献
获取专利

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号