SYSTEM AND DEVICE FOR PARALLEL EXECUTION OF MEMORY TRANSACTION BY USING PLURAL MEMORY MODELS

摘要

PROBLEM TO BE SOLVED: To provide a data processor for supporting the use of plural memory models by a computer program. ;SOLUTION: A logic circuit 130 inside a memory controller 114 determines whether or not a memory transaction related to a most recently received memory transaction request can be executed before the other reserved memory transactions, based on the memory model related to the most recently received memory transaction request and the memory model related to at least one other reserved memory transaction, and then stores data for indicating ordering judgement in a transaction scoreboard. The memory controller 114 executes the reserved memory transactions in an order matched with memory transaction order data. As a result, the sub-sets of the reserved memory transactions are executed in the order different from the order received from the data processor.;COPYRIGHT: (C)1999,JPO