Method and apparatus for detection, based on the regions of interfência between memory operations reordered in a processor.

摘要

Invention patent: b Mu "method and apparatus for detection, based on the regions of interference among reordered memory operations in a processor" MV d .A computer processing system stores sequences of instructions in memory for execution by a processor unit.A load instruction out of order can be created, either static or dynamically.Moving a loading instruction from its original position in a sequence of instructions to a position ahead in that sequence of instructions.This load instruction out of order identifies a location in memory from which to read a given.The present invention consists of a device that maps the space to memory addresses of the computer system in the regions.And detects the incorrect execution of a loading place in front of a storage operation sequentially preceding (in the order of the program).More specifically, the apparatus detects loading operations out of order.Uses a table mapping based on the regions to keep abreast of the regions of memory accessed by the loading operations out of order detects the execution of storage operations inThe regions accessed by loading operations out of order, and instructs the processor to execute a sequence of recovery when it is detected interference among reordered operations.The invention is applicable to the static and dynamic reordering of memory operations.