CACHE COHERENCE UNIT FOR INTERCONNECTING MULTIPROCESSOR NODES HAVING PIPILINED SNOOPY PROTOCOL

摘要

The present invention consists of a cache coherence protocol within a cache coherence unit for use in a data processing system. The data processing system is comprised of multiple nodes, each node having a plurality of processors with associated caches, a memory, and input/output. The processors within the node are coupled to a memory bus operating according to a 'snoopy' protocol. This invention includes a cache coherence protocol for a sparse directory in combination with te multiprocessor nodes. In addition, the invention has the following features: the current state and information from the incoming bus request are used to make an immediate decision on actions and next state; the decision mechanism for outgoing coherence is pipelined to follow the bus; and the incoming coherence pipeline acts independently of outgoing coherence pipeline.