Memory device and fast write recovery method for fast write recovery

摘要

Memory 10, such as current sensing static random access memory (SRAM), implements fast write recovery through bit line loading and two additional mechanisms. First, the additional load 252 on the assigned data line is brought into an active state for the fast write recovery process. Second, a plurality of columns 200, 202, 204 are connected to a common data line during a write recovery so that the column written during the write cycle can be precharged again by partially partitioning the charge using the charge stored in the other column . It is possible to recover the high speed write operation with a minimum of the column pitch through the above two mechanisms and to avoid a problem caused when the load is placed on the write data line.