Memory device having clock synchronous free-charge data input / output line and data input / output line free charge method using the same

摘要

In a synchronous semiconductor memory device, a control device and a free charge method of a data input / output line precharge signal are disclosed.;The present invention improves the performance of a semiconductor memory device by eliminating unnecessary margins in controlling both the enable signal and the column select signal of the data input / output line in synchronization with the external clock signal.;By making the pulse width of the precharge signal of the data input / output line different from that of the frequency, the constraint according to the pulse width of the precharge signal of the data input / output line is relaxed and the productivity is improved.