首页> 外国专利> Packetized basic bit sequence reconstruction device for the interface of encoder and multiplexing period

Packetized basic bit sequence reconstruction device for the interface of encoder and multiplexing period

机译:编码器和复用周期接口的分组基本位序列重构装置

摘要

1. TECHNICAL FIELD OF THE INVENTION;The present invention relates to a packetized basic bit string reconstruction apparatus.;2. The technical problem to be solved by the invention;The present invention provides an interface of an encoder and a multiplexing period for correcting an error generated by comparing basic bit string clock reference (ESCR) information included in a header of a packetized basic bit string with system timing clock information in a multiplexer at a specific period. To provide a packetization basic bit string reconstruction device.;3. Summary of Solution of the Invention;The present invention includes a detector for detecting basic bit string clock reference information from an input packetized basic bit string; A clock generator for generating time stamp information; A comparator for comparing the input basic bit string clock reference information and time stamp information and outputting an error value thereof; And a reconstruction unit for reconstructing the packetized basic bit string by correcting the reproduction and decoding timestamp of the input packetized basic bit string by the error value.;4. Important uses of the invention;The present invention is used in an encoding device and the like.
机译:分组化的基本比特串重构设备技术领域本发明涉及一种分组化的基本比特串重构设备; 2。本发明要解决的技术问题;本发明提供了一种编码器和复用时段的接口,用于校正通过将打包的基本比特串的头部中包括的基本比特串时钟参考(ESCR)信息与特定周期内多路复用器中的系统定时时钟信息。提供一种打包基本位串的重建装置; 3。本发明的解决方案概述:本发明包括一个检测器,用于从输入的打包基本比特串中检测基本比特串时钟参考信息。时钟发生器,用于产生时间戳信息;比较器,用于比较输入的基本位串时钟参考信息和时间戳信息并输出其误差值;以及重构单元,用于通过用误差值校正输入的打包基本比特串的再现和解码时间戳来重构打包基本比特串。本发明的重要用途;本发明用于编码设备等。

著录项

  • 公开/公告号KR19990043122A

    专利类型

  • 公开/公告日1999-06-15

    原文格式PDF

  • 申请/专利权人 이계철;정선종;

    申请/专利号KR19970064108

  • 发明设计人 이한규;김진웅;김재곤;

    申请日1997-11-28

  • 分类号H04L9/00;

  • 国家 KR

  • 入库时间 2022-08-22 02:17:11

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