Multiprocessor System Performance Measurement Using Cache Coherence Protocol

摘要

The present invention relates to a multi-processor system performance measurement method using a cache coherence protocol that can facilitate performance measurement by modeling a multi-processor and developing a simulator to evaluate the effect of the second cache memory on the system performance. In the simulator, each processor performs one memory reference to execute after deciphering, decoding, and executing instructions for every cycle, the processor stores memory requests in its cache's service queue, waits for a response, and the cache Is occupied, waits for it to be released, but once request processing is complete it either signals the processor or requires an operation on a shared block that has data from the system bus, and the processor is cached for the cache coherence protocol. Using bits It is achieved by a process that supports multiple protocols.