Network Synchronized E3 and Ds3 Clock Generators

摘要

1. TECHNICAL FIELD OF THE INVENTION;The present invention relates to network synchronized E3 and DS3 clock generation devices.;2. The technical problem to be solved by the invention;An object of the present invention is to provide a simple and stable network synchronized E3 and DS3 clock generator using a commercially available digital phase locked loop.;3. Summary of the Solution of the Invention;The present invention provides a first digital phase locked loop means for generating a 155.52 x 2 MHz clock, a first dividing means for dividing by 27 to produce an output of 11.52 MHz, and a second digital phase for generating 335.52 MHz with an output clock. Fixed loop means, second divider means for 3x5 division to produce 22.368 MHz, and third digital phase locked loop means for outputting 44.736 MHz.;4. Important uses of the invention;The present invention is used in a clock generator.