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Interface circuit between asynchronous transmission mode handler and asynchronous transmission mode transceiver of subscriber side asymmetric digital subscriber line modem in asymmetric digital subscriber line system
Interface circuit between asynchronous transmission mode handler and asynchronous transmission mode transceiver of subscriber side asymmetric digital subscriber line modem in asymmetric digital subscriber line system
In the ADSL modem of the subscriber side of an asymmetric digital subscriber line (ADSL) system, a simple logic configuration circuit is added between an ATM handler and an ATM transceiver, so that data transmission / reception using UTOPIA I communication method between an ATM handler and an ATM transceiver is possible. The present invention relates to an interface circuit between an ATM handler and an ATM transceiver of a subscriber-side ADSL modem in an ADSL system, in which an ATM handler and an ATM transceiver, which are the same physical layer, are master and slashed according to an externally provided 3.2 MHz clock. Enable to operate as an Eve, and each of these enabled ATM handlers and ATM transceivers send and receive signals indicating that the ATM cell data is ready to be sent / received, starting with the first ATM cell data and starting with the ATM handler and ATM. It is characterized in that for transmitting and receiving ATM cell data between the transceivers, Thus, by implementing a simple logic circuit that operates according to the external clock, it is possible to smoothly transmit / receive ADSL service data by UTOPIA I communication method between the ATM handler and the ATM transceiver in the subscriber-side ADSL modem in the ADSL system. There is.
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