A low jitter voltage controlled oscillator under noisy

摘要

The present invention for solving, the problem that occurs is a change in the output oscillation frequency of the conventional voltage controlled oscillator with respect to the source voltage changes do not constant relates to a voltage controlled oscillator insensitive to the influence of the supply voltage.; A pseudo N-type MOS (NMOS Pseudo) voltage source (38) varies according to the voltage-controlled oscillator, the power supply voltage using the inverter (36) was used to realize the present invention. Typically a voltage-controlled oscillator output frequency is inversely proportional to the time constant of the delay cell (Cell Delay). The time constant according to the increase and decrease of the power supply voltage is decreasing and increasing it to remain constant for the output frequency to the power supply voltage kept constant the time constant. That is, a simple principle with a voltage that varies according to the pseudo N-type MOS (NMOS Pseudo) inverted groups the supply voltage for suppressing the change in the time constant of the delay cell (Cell Delay) by the power supply voltage.; Voltage control of the present invention as outlined oscillator is a simple principle and structure of the power supply voltage synchronization circuit, wonchiphwa (One Chip) is a voltage-controlled oscillator required hayeoteumeuro using the method of compensating for a change in frequency integrated circuits require an internal clock generator according to a It can be applied.