FREQUENCY SYNTHESIZER AND MISSILE RADAR SYSTEM USING FREQUENCY SYNTHESIZER

摘要

The low noise frequency synthesizer 10 uses analog gain compensation of the frequency divider 13 and 15 and the phase / frequency detector 17 to provide lower noise, lower parasitic levels and faster switching speeds than conventional frequency synthesis methods. At least one of the two dividers 13 and 15 (the divider 15) may be incremented and decremented at the half integer stage. A key feature of the present invention is the ability to compensate the loop for frequency division changes by adjusting the half-integer dividers 13, 15 and phase controller gain. The frequency synthesizer 10 has two dividers 13 and 15, which provide two reference frequency signals which act as input and output signals of the frequency synthesizer 10. The voltage controlled oscillator (VCO) 18 provides the output signal f _O of the frequency synthesizer 10. Phase / frequency detector 17 compares the reference frequency signals and provides a phase error output signal that is passed to VCO 18. A digital controller having a PROM 11 and a digital analog converter 12 selects the frequency division by adjusting the gain of the phase detector 17 to compensate for the frequency division change. The frequency synthesizer 10 provides low phase noise, low parasitic levels and fast channel switching. To generate a frequency step of a given magnitude, the frequency division is half of that step size. By having the frequency divider half of the step size, the noise distribution from the divider is reduced accordingly. Phase margin improves with reduced loop peaking in the noise spectrum. A missile radar system using the frequency synthesizing apparatus of the present invention is also disclosed.