首页>
外国专利>
16-bit parallel descrambling data generation circuit with 16-bit parallel descrambler
16-bit parallel descrambling data generation circuit with 16-bit parallel descrambler
展开▼
机译:具有16位并行解扰器的16位并行解扰数据产生电路
展开▼
页面导航
摘要
著录项
相似文献
摘要
The present invention relates to a 16-bit parallel descrambling data generation circuit of a 16-bit parallel descrambler in a CD-ROM decoder. In particular, the 16th descrambling data is obtained by using a current descrambling value. A 16-bit parallel descrambling data generation circuit of a 16-bit parallel descrambler that removes a register for storing a 16th descrambling value.;According to the present invention, in obtaining the 16th descrambling data, the register for storing the 16th descrambling data can be eliminated by using the current descrambling data without using the method of obtaining the previous value. It is easy to configure.
展开▼