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Memory management system for X86 compatible processor
Memory management system for X86 compatible processor
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机译:X86兼容处理器的内存管理系统
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摘要
The memory management system for an X86 compatible processor that has a translation -lookaside-buffer (40) has a descriptor table (10) and a segment register (20) that stores the read descriptor values. The values are summed (60) with an offset value to generate a linear address (LADD) fed to the buffer and a page information table (50). An Independent claim is included for a method for a memory management system.
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