首页> 外国专利> Piezoelectric element package in which a piezoelectric element on a chip carrier is reliably shielded by using a cap

Piezoelectric element package in which a piezoelectric element on a chip carrier is reliably shielded by using a cap

机译:压电元件封装,其中使用盖可靠地屏蔽了芯片载体上的压电元件

摘要

A piezoelectric element package includes a chip carrier having a shielding surface and a cavity for enclosing a piezoelectric element therein, and a cap having a central axis and a shielding material on a bottom surface of the cap, the cap shielding the piezoelectric element, enclosed in the cavity of the chip carrier, with the shielding material bonded to the shielding surface of the chip carrier. The cap is in a substantially circular shape and the shielding material of the cap and the shielding surface of the chip carrier are bonded to each other such that a bonding area between the shielding material and the shielding surface is unchanged.
机译:压电元件封装包括:芯片载体,其具有屏蔽表面和用于将压电元件封闭在其中的腔;以及盖,其具有中心轴,并且在该盖的底表面上具有屏蔽材料,该盖将压电元件屏蔽,封装在其中。在芯片载体的空腔中,屏蔽材料粘结到芯片载体的屏蔽表面上。盖为大致圆形,并且盖的屏蔽材料与芯片载体的屏蔽表面彼此结合,使得屏蔽材料与屏蔽表面之间的结合面积不变。

著录项

  • 公开/公告号US5838093A

    专利类型

  • 公开/公告日1998-11-17

    原文格式PDF

  • 申请/专利权人 FUJITSU LIMITED;

    申请/专利号US19970803308

  • 发明设计人 TAKUMI KOORIIKE;YOSHIMI SAKAI;

    申请日1997-02-20

  • 分类号H01L41/08;H03H9/15;

  • 国家 US

  • 入库时间 2022-08-22 02:09:41

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