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Method for manufacturing planar field effect transistors and planar high electron mobility transistors

机译:平面场效应晶体管的制造方法及平面高电子迁移率晶体管

摘要

An apparatus and method of processing a planar HEMT or FET semiconductor device is disclosed. An ohmic metalization is patterned on a semiconductor surface then lifted-off. A plurality of process control monitors are isolated, preferably using a wet etch process. The process control monitors preferably include transmission line patterns (TLMs) and etch field effect transistors The TLMs measure the contact resistance during the ohmic alloy process, and the etch field effect transistors monitor the drain current during the gate-recess step. The ohmic metalizations are then alloyed, and a gate is written using an electron beam. The semiconductor device is isolated, followed by application of an overlay which connects all resulting planar device connecting pads.
机译:公开了一种处理平面HEMT或FET半导体器件的设备和方法。在半导体表面上对欧姆金属化层进行构图,然后剥离。隔离多个过程控制监视器,最好使用湿法蚀刻过程。所述过程控制监控器优选地包括传输线图案(TLM)和蚀刻场效应晶体管。所述TLM在欧姆合金工艺期间测量接触电阻​​,并且所述蚀刻场效应晶体管在栅极凹陷步骤期间监测漏极电流。然后将欧姆金属化合金化,并使用电子束写入栅极。隔离半导体器件,然后施加覆盖层,该覆盖层连接所有产生的平面器件连接焊盘。

著录项

  • 公开/公告号US5854086A

    专利类型

  • 公开/公告日1998-12-29

    原文格式PDF

  • 申请/专利权人 HUGHES ELECTRONICS CORPORATION;

    申请/专利号US19960697231

  • 发明设计人 MEHRAN MATLOUBIAN;JEFFREY B. SHEALY;

    申请日1996-08-21

  • 分类号H01L21/66;H01L21/28;H01L21/44;G01R31/26;

  • 国家 US

  • 入库时间 2022-08-22 02:09:03

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