首页> 外国专利> Bandwidth efficient method and means for resynchronizing a master and slave over a clocked, arbitrated, bidirectional multistate parallel bus using local data recirculation, wait states, and cycle stealing

Bandwidth efficient method and means for resynchronizing a master and slave over a clocked, arbitrated, bidirectional multistate parallel bus using local data recirculation, wait states, and cycle stealing

机译:使用本地数据再循环,等待状态和周期窃用,通过时钟,仲裁,双向多状态并行总线重新同步主机和从机的带宽有效方法和装置

摘要

A method and means for efficiently utilizing bus bandwidth among processors and input/output devices burst coupled in master/slave pairs over a clocked, arbitrated, bidirectional, multistate, local communications bus. The method resynchronizes arbitrated masters and selected slaves perturbed during their bus-coupled transactions by recirculating data during a write operation at a bus master in the absence of a slave acceptance signal, or recirculating by a slave in the absence of a master response. The recirculating master or slave responsive to a delayed indication from its passive opposite then sends out the data over the bus at an integral multiple of the clock rate.
机译:一种通过时钟,仲裁,双向,多状态本地通信总线有效地利用以主/从对成对耦合的处理器和输入/输出设备之间的总线带宽的有效利用方法和装置。该方法通过在不存在从机接收信号的情况下在总线主机上进行写操作期间再循环数据,或者在不存在主机响应的情况下由从机进行再循环,从而使仲裁的主机和选定的从机在其总线耦合事务期间受到干扰,从而重新同步。循环主机或从机响应来自其被动相反端的延迟指示,然后以时钟速率的整数倍通过总线发送数据。

著录项

  • 公开/公告号US5859986A

    专利类型

  • 公开/公告日1999-01-12

    原文格式PDF

  • 申请/专利权人 INTERNATIONAL BUSINESS MACHINES CORPORATION;

    申请/专利号US19970803362

  • 发明设计人 GEORGE B. MARENIN;

    申请日1997-02-20

  • 分类号G06F13/34;

  • 国家 US

  • 入库时间 2022-08-22 02:08:54

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