System for managing direct memory access transfer in a multi- channel system using circular descriptor queue, descriptor FIFO, and receive status queue

摘要

A method and apparatus of managing a multi-channel direct memory access (DMA) operation in which descriptors of data buffers are stored in a circular descriptor queue. The descriptors of those data buffers that are currently available for use in a DMA transfer are maintained in contiguous locations in the descriptor queue. The location of the first available descriptor and the number of currently available descriptors in the descriptor queue are provided to a network controller. Based on this information, the network controller then obtains a set of available descriptors and fills the corresponding buffers with data as it arrives on the different channels. When the use of a data buffer in a DMA transfer is complete, the descriptor for this buffer is made available again in the descriptor queue by re-filling this descriptor immediately following the available descriptors. No matter in which order the individual channels of the multi-channel system use and return the data buffers, the available descriptors are maintained in contiguous locations in the descriptor queue, increasing the efficiency of the system since searching through the descriptor queue for available descriptors is not required.