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SPDIF-AES/EBU digital audio data recovery

机译:SPDIF-AES / EBU数字音频数据恢复

摘要

A circuit for decoding an input signal includes a measurement circuit having an input to receive a timing clock signal that is asynchronous with clocking of the input signal, to measure duration of a plurality of pulses received on the input signal in relation to frequency of the timing clock signal and a decode circuit to decode the input signal into digital data. In one embodiment, the circuit may include a servo mechanism for generating the timing clock signal to have a frequency that varies in response to variations in frequency of clocking of data on the input signal. The servo mechanism may include a digitally controlled oscillator and a feedback circuit, to control the digital frequency of the digitally controlled oscillator in response to variation of clocking of data on the input signal. The invention permits use of all digital components for decoding digital audio data encoding using biphase- mark encoded data according to the SPDIF or AES/EBU standards.
机译:用于对输入信号进行解码的电路包括测量电路,该测量电路具有输入以接收与输入信号的计时异步的定时时钟信号,以相对于定时频率来测量在输入信号上接收的多个脉冲的持续时间。时钟信号和解码电路,将输入信号解码为数字数据。在一个实施例中,该电路可以包括伺服机构,该伺服机构用于产生定时时钟信号以具有响应于输入信号上的数据的时钟频率的变化而变化的频率。伺服机构可以包括数控振荡器和反馈电路,以响应于输入信号上的数据时钟的变化来控制数控振荡器的数字频率。本发明允许使用所有数字组件来解码根据SPDIF或AES / EBU标准的使用双相标记编码的数据的数字音频数据编码。

著录项

  • 公开/公告号US5889820A

    专利类型

  • 公开/公告日1999-03-30

    原文格式PDF

  • 申请/专利权人 ANALOG DEVICES INC.;

    申请/专利号US19960727020

  • 发明设计人 ROBERT W. ADAMS;

    申请日1996-10-08

  • 分类号G11B5/09;H03D3/00;

  • 国家 US

  • 入库时间 2022-08-22 02:08:24

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