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DS-CDMA receiver with multi-stage serial interference cancelers using power level information appended to data blocks
DS-CDMA receiver with multi-stage serial interference cancelers using power level information appended to data blocks
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机译:具有多级串行干扰消除器的DS-CDMA接收机,使用附加在数据块上的功率电平信息
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摘要
A direct-sequence CDMA receiver comprises power detectors for receiving a spread spectrum signal for detecting the power levels of user channels. A channel ranking circuit determines the ranks of the power levels. A framing circuit segments the received spread spectrum signal into data blocks and appending, to each of the data blocks, a header containing channel numbers identifying the user channels arranged according to the determined power level ranks. A plurality of serial interference cancellation stages are provided, each including interference cancelers arranged in descending order of ranks. Each interference canceller detects one of the channel numbers of the header corresponding to the rank of the interference canceler, and removes one or more interfering signals from an associated user channel by using a despreading code that corresponds to the detected channel number.
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