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Circuit for setting a device into a test mode by changing a first port to a fixed clock and a second port to a non-fixed clock
Circuit for setting a device into a test mode by changing a first port to a fixed clock and a second port to a non-fixed clock
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机译:通过将第一端口更改为固定时钟并将第二端口更改为非固定时钟来将设备设置为测试模式的电路
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摘要
An apparatus for setting a device into a test mode. The apparatus has a first input port for receiving a fixed, constant signal during a normal mode of the device, and for receiving a non-fixed, clocked signal so as to set the device into a test mode. The apparatus also has a second input port for receiving a non-fixed, clocked signal during the normal mode and for receiving a fixed, constant signal so as to set the device into the test mode. When both the first input port receives the non-fixed, clocked signal and the second input port receives the fixed, constant signal for a predetermined amount of time, the device is placed into the test mode.
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