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Pseudo-random number generator capable of efficiently exploiting processors having instruction-level parallelism and the use thereof for encryption
Pseudo-random number generator capable of efficiently exploiting processors having instruction-level parallelism and the use thereof for encryption
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机译:能够有效利用具有指令级并行性的处理器的伪随机数生成器及其用于加密的用途
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摘要
In a finite state machine having a plurality of registers, a stream of pseudo-random numbers is generated by a method having characteristic non- zero integral value N. Repeatedly, over a series of time steps, a set of N combined values is calculated by applying N non- linear combining functions to N input sets of values and registering each combined value in one of N registers. At any time step after N time steps each input set consists of combined values, except that one input set may include as one value the result of combining a combined value with a value from an input stream, and at least two input sets comprise only registered values from distinct registers.
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