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amp;pi;/4 SHIFT QPSK MODULATOR AND COMMUNICATION APPARATUS

机译:π/ 4移位QPSK调制器和通信设备

摘要

PROBLEM TO BE SOLVED: To reduce the storage capacity of ROM for previously storing impulse response data, save power consumption and also reduce a circuit scale. ;SOLUTION: In an impulse response storage part 124 in an impulse response arithmetic circuit 12, the storage capacity of impulse response data is reduced by half by commonly using impulse response data with a waveform at one side in an impulse response waveform being horizontally symmetric with a maximum value as a center. Besides, a read address signal is changed over by an address inverting part 123 with a simple configuration in order not to simultaneously perform access to blocks with two kinds of sizes '1' and '1/2' in the impulse response storage part 124. Besides, an encoding inversion processing and a zero replacement processing corresponding to two pieces of phase information from a shift register 12 are executed by one numerical value converting part 126.;COPYRIGHT: (C)2000,JPO
机译:要解决的问题:为了减少ROM的存储容量以预先存储脉冲响应数据,可以节省功耗并减小电路规模。 ;解决方案:在脉冲响应运算电路12中的脉冲响应存储部分124中,通过共同使用脉冲响应数据中脉冲波形的水平对称的一侧的脉冲响应数据,将脉冲响应数据的存储容量减小一半。以最大值为中心。此外,通过地址反转部分123以简单的配置来切换读取的地址信号,以便不同时执行对脉冲响应存储部分124中大小为“ 1”和“ 1/2”的两种块的访问。此外,由一个数值转换部分126执行对应于来自移位寄存器12的两段相位信息的编码求逆处理和零替换处理。COPYRIGHT:(C)2000,JPO

著录项

  • 公开/公告号JP2000232488A

    专利类型

  • 公开/公告日2000-08-22

    原文格式PDF

  • 申请/专利权人 SHARP CORP;

    申请/专利号JP19990033876

  • 发明设计人 NISHIZAWA MASAHARU;

    申请日1999-02-12

  • 分类号H04L27/20;

  • 国家 JP

  • 入库时间 2022-08-22 02:01:03

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