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An input buffer controller using back-pressure signals in ATM switches and a method for determining the logical queue depth

机译:在ATM交换机中使用背压信号的输入缓冲控制器以及确定逻辑队列深度的方法

摘要

A controller for the logical buffer depth in ATM switching system and a method for determining the logical queue depth, using the back-pressure signal and the occupied buffer depth information and supporting the P classes, are disclosed. The controller includes Routing Table Element making tag for routing of input cell; Input Buffer storing the cell that a tag is attached to in said routing table element; Switch fabric that reads the cell from said input buffer and then switches it to the output port; and Input buffer controller controlling the logical queue size in said input buffer. And the method for determining the logical queue depth includes the steps of calculating the back-pressure signal occurrence rate bi of the ith class; calculating the back-pressure signal occurrence threshold rate bi-th of the ith class; calculating the buffer depth Ti of the logical queue of the ith class; calculating threshold values TiH, TiL of the two buffer depths of the ith class; calculating the buffer size Li of the logical queue of the ith class; calculating the empty area size Dj(j=1, 2, 3, L, P) of logical queues for the number of p classes.
机译:公开了一种用于ATM交换系统中的逻辑缓冲器深度的控制器和一种使用背压信号和占用的缓冲器深度信息并支持P类来确定逻辑队列深度的方法。控制器包括用于路由输入单元的路由表元素制作标签;输入缓冲器,其在所述路由表元素中存储标签所附的信元;交换结构,它从所述输入缓冲区读取单元,然后将其切换到输出端口;输入缓冲器控制器控制所述输入缓冲器中的逻辑队列大小。确定逻辑队列深度的方法包括计算第i类背压信号发生率bi的步骤;计算第i类的背压信号发生阈值比率的二分之一;计算第i类逻辑队列的缓存深度Ti;计算第i类的两个缓冲深度的阈值TiH,TiL;计算第i类逻辑队列的缓冲区大小Li;为p类的数量计算逻辑队列的空白区域大小Dj(j = 1、2、3,L,P)。

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