ENHANCED WORD LINE DRIVER TO REDUCE GATE CAPACITANCE FOR LOW VOLTAGE APPLICATIONS

摘要

An enhanced word line driver circuit suitable for use on integrated circuits such as flash memory devices with voltage boosting includes a load reduction circuit. In response to a boosted voltage, the load reduction circuit decouples a gate capacitance load of deselected enhanced word line drivers (210) from the boost voltage generator (208). The reduction of capacitive loading decreases power consumption and shortens the voltage boost time of the memory device.