METHOD AND STRUCTURE FOR TESTING SYSTEM-ON-CHIP IC BASED ON EMBEDDED CORES

摘要

PURPOSE: A method and a structure for testing SoC IC(system-on-chip IC) based on embedded cores are provided to test the embedded cores without increasing hardwares substantially within the SoC IC. CONSTITUTION: Embedded cores of SoC IC have a micro processor core(10), memory core(3), and other functional cores(5, 6, 7). A plurality of register are provided to test the micro processor. The micro processor is tested by performing a demand of the micro processor with pseudo random data several times and evaluating the results by means of comparing with simulation results. A test program is applied to the micro processor to generate memory test pattern in the micro processor core(10). The memory test pattern is applied to the memory core(3) and respondence from the memory core(3) is evaluated in the micro processor. A function specific test program is applied to the other functional cores(5, 6, 7) and the other functional cores(5, 6, 7) are evaluated by evaluating the output signal of the other functional cores(5, 6, 7) in the micro processor.