首页> 外国专利> Demodulator circuit in DTB Digital Terrestrial Broadcasting and public address receiver

Demodulator circuit in DTB Digital Terrestrial Broadcasting and public address receiver

机译:DTB数字地面广播和公共广播接收器中的解调器电路

摘要

One digital terrestrial broadcast and public address receiver disclose in which hardware realization is simplified. In this demodulator circuit, analog/digital conversion unit is the intermediate-freuqncy signal for being converted to a digital signal by channel reception, and the intermediate-freuqncy signal that the demodulation of variable rate demodulator is exported from analog/digital conversion unit is to generate baseband I and Q signal conversion. First and second SQRC filters/FFE uses the baseband I and Q signal that export from variable rate demodulator using a scheduled filter coefficient to remove noise and linear interference, and DFE removes first and second SQRC filter and exports a signal obtained by cursor after removing. First and second subtracter calculates difference, it is in first and second SQRC filter/between the output quantity of FFE and the output quantity of DFE, first and second slicer determines the signal that export from first and second subtracter, and the execution of FEC decoders is from the forward error correction on the signal that first and second slicer exports. Filter coefficient control unit controls first and second SQRC filters/FFE and DFE filter coefficient according to initial operation mode and normal operation mode. According to this configuration, since SQRC filtering functions and FFE functions are implemented as a by-pass filtration, filter coefficient update is done according to including being removed simultaneously by control receiving initial operation mode in signal and normal operation mode, noise and interference.
机译:公开了一种数字地面广播和公共地址接收器,其中简化了硬件实现。在该解调器电路中,模拟/数字转换单元是用于通过信道接收被转换为数字信号的中间频率信号,并且从模拟/数字转换单元输出的可变速率解调器的解调的中间频率信号是:生成基带I和Q信号转换。第一和第二SQRC滤波器/ FFE使用从可变速率解调器输出的基带I和Q信号(使用计划的滤波器系数)来消除噪声和线性干扰,而DFE会去除第一和第二SQRC滤波器并在去除后输出由光标获得的信号。第一和第二减法器计算差值,它在第一和第二SQRC滤波器中/ FFE的输出量与DFE的输出量之间,第一和第二限幅器确定从第一和第二减法器输出的信号,并执行FEC解码器来自第一和第二限幅器输出信号的前向纠错。滤波器系数控制单元根据初始操作模式和正常操作模式来控制第一和第二SQRC滤波器/ FFE和DFE滤波器系数。根据该配置,由于SQRC滤波功能和FFE功能被实现为旁路滤波,因此通过包括通过接收信号和正常操作模式下的初始操作模式,噪声和干扰的控制来同时移除滤波器系数来进行滤波系数更新。

著录项

  • 公开/公告号KR20000034434A

    专利类型

  • 公开/公告日2000-06-26

    原文格式PDF

  • 申请/专利权人 전주범;

    申请/专利号KR19980051770

  • 发明设计人 이창의;

    申请日1998-11-30

  • 分类号H04N7/18;

  • 国家 KR

  • 入库时间 2022-08-22 01:45:43

相似文献

  • 专利
  • 外文文献
  • 中文文献
获取专利

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号