FAULT DETECTION AND INITIALIZATION PULSE GENERATION APPARATUS OF STM-N TIMER FOR AUTOMATIC RECOVERY AT SDH-BASED ATM COMMUNICATIONS

摘要

The present invention relates to an apparatus for generating a reset signal for error detection and automatic recovery of a STM-n (Synchronous Transport Module-n, n = 1,4,16 ..) timer in SDH based ATM communication. The present invention detects the switching operation between two clock sources from the Loss Of Signal (LOS) information of the bit synchronization device, and determines whether the digital circuit is affected by the switching, out of frame (OFF) and Framing Word Detection Indication Signal (FPID). ) If it is judged that it is abnormal operation state after judging from the information, it generates a reset signal and initializes the timer circuit of STM-n (n = 1,4,16) frame data so that it can automatically recover from abnormal operation state caused by clock glitch. The present invention relates to an apparatus for generating a reset signal for error detection and automatic recovery of a timer circuit for processing STM-n (n = 1,4,16) frame data.