LOW PHASE NOISE CMOS FRACTIONAL-N FREQUENCY SYNTHESIZER FOR WIRELESS COMMUNICATIONS

摘要

PURPOSE: A CMOS fractional N frequency synthesizer for wireless communications having low phase noises is provided to reduce noise due to quantization, save power consumption, change output frequency quickly, reduce spurious and simplify the circuit configuration. CONSTITUTION: The CMOS fractional N frequency synthesizer(100) includes a reference divider(110), a phase-frequency detector(120), a charging pump(130), a loop filter(140), a voltage controlled oscillator(150), a multimodulus prescaler(160), a 3rd order sigma-delta modulator(170) and an RF output buffer(180). Here the digital phase -frequency detector(120) and the charging pump(130) forms a phase-frequency detector. The voltage controlled oscillator(150) responds to the frequency control voltage(Vc) from the loop filter(140) and produces a variable frequency(F3). The sigma-delta modulator9170) responds to the m-bit frequency setting data signal and produces a scale controlling data signal(SC). The phase error signal from the phase-frequency detector(120) is sent to the voltage controlled oscillator(150) through the loop filter(140).