The present invention relates to a 24 24 non-blocking switching matrix circuit. In the conventional 12 12 signal matrix circuit, the number of switching signal units is limited. Therefore, there is a problem in processing speed in processing a large amount of data.;The 24 24 non-blocking switching matrix circuit according to the present invention has an input interface unit 10 for interfacing with twelve twelve STS-1 (Synchronous Transport Singal Level-1) signals TD1 to TD24, Four 12 12 matrix gate arrays 21 arranged in parallel to receive 24 STS-1 signals grouped by twelve from the input interface unit 10 and to switch them without blocking and output one of 12 output terminals 1 signal switching gate array unit 20 of the STS-1 signal switching gate array unit 20 and the first, second, third, and fourth matrix gate arrays 20, 22, 23, And an output interface unit 30 for interfacing the twelve output terminals of each of the plurality of output units 21, 22, 23, 24 to produce 24 output terminals.
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