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New double-sided polished semiconductor wafer has extremely low front face site front surface-referenced least squares ratio planarity values varying insignificantly between the wafer edge and central regions
New double-sided polished semiconductor wafer has extremely low front face site front surface-referenced least squares ratio planarity values varying insignificantly between the wafer edge and central regions
A semiconductor wafer has extremely low front face site front surface-referenced least squares ratio (SFQR) values varying insignificantly between the wafer edge and central regions. Semiconductor wafer has a front face with a maximum local planarity value (SFQRmax) of = 0.13 microns m and individual SFQR values in the wafer edge region which do not differ significantly from those in the central region. An Independent claim is also included for a double-sided polishing process for producing the above wafer, in which the wafer thickness is initially 20-200 microns m greater than the carrier thickness and, after polishing, is 2-20 microns m greater than the carrier thickness.
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