首页> 外国专利> Memory test unit for applying preset test pattern signal to semiconductor memory; has sections to produce two time control pulses and two nonreturn to zero waveforms

Memory test unit for applying preset test pattern signal to semiconductor memory; has sections to produce two time control pulses and two nonreturn to zero waveforms

机译:存储器测试单元,用于向半导体存储器施加预设的测试模式信号;具有产生两个时间控制脉冲和两个不归零波形的部分

摘要

The unit has a two-pattern data production section (22), to generate two sets of data in a working period in a pattern generator (2). A section (33) arranged in a time control generator (3) produces two time-controlled pulses in a working period. A wave former (4) has a section (44) to produce two nonreturn to zero waveforms, on the basis of two test signal data sets and two time control pulses. The unit has a two-pattern data production section (22), to generate two sets of data in a working period in a pattern generator (2). A section (33) arranged in a time control generator (3) produces two time-controlled pulses in a working period. A wave former (4) has a section (44) to produce two nonreturn to zero waveforms, on the basis of two test signal data sets supplied by the pattern generator and two time control pulses supplied by the time control generator. The nonreturn to zero waveforms are applied to a memory (9) to be tested. The test unit alternately measures the set-up time (Tds) and the holding time (Tdh) of the memory to be tested by alternately application of the two nonreturn to zero waveforms at the memory to be tested, and by a logical comparison of a response signal read out from the memory to be tested with an anticipated value pattern signal.
机译:该单元具有两模式数据产生部分(22),以在工作周期内在模式发生器(2)中产生两组数据。布置在时间控制发生器(3)中的部分(33)在工作周期中产生两个时间控制的脉冲。波形形成器(4)具有一个部分(44),用于根据两个测试信号数据集和两个时间控制脉冲来生成两个不归零波形。该单元具有两模式数据产生部分(22),以在工作周期内在模式发生器(2)中产生两组数据。布置在时间控制发生器(3)中的部分(33)在工作周期中产生两个时间控制的脉冲。波形形成器(4)具有部分(44),其基于由模式发生器提供的两个测试信号数据集和由时间控制发生器提供的两个时间控制脉冲来产生两个不归零波形。不归零波形被施加到要测试的存储器(9)。测试单元通过在待测存储器上交替施加两个不归零波形,并交替进行逻辑比较,测量待测存储器的建立时间(Tds)和保持时间(Tdh)。从存储器读取的响应信号与预期值模式信号。

著录项

  • 公开/公告号DE19933792A1

    专利类型

  • 公开/公告日2000-02-24

    原文格式PDF

  • 申请/专利权人 ADVANTEST CORP. TOKIO/TOKYO;

    申请/专利号DE1999133792

  • 发明设计人 HOUSAKO TAKAHIRO;

    申请日1999-07-19

  • 分类号G11C29/00;G01R31/28;

  • 国家 DE

  • 入库时间 2022-08-22 01:42:03

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