首页>
外国专利>
Memory test unit for applying preset test pattern signal to semiconductor memory; has sections to produce two time control pulses and two nonreturn to zero waveforms
Memory test unit for applying preset test pattern signal to semiconductor memory; has sections to produce two time control pulses and two nonreturn to zero waveforms
The unit has a two-pattern data production section (22), to generate two sets of data in a working period in a pattern generator (2). A section (33) arranged in a time control generator (3) produces two time-controlled pulses in a working period. A wave former (4) has a section (44) to produce two nonreturn to zero waveforms, on the basis of two test signal data sets and two time control pulses. The unit has a two-pattern data production section (22), to generate two sets of data in a working period in a pattern generator (2). A section (33) arranged in a time control generator (3) produces two time-controlled pulses in a working period. A wave former (4) has a section (44) to produce two nonreturn to zero waveforms, on the basis of two test signal data sets supplied by the pattern generator and two time control pulses supplied by the time control generator. The nonreturn to zero waveforms are applied to a memory (9) to be tested. The test unit alternately measures the set-up time (Tds) and the holding time (Tdh) of the memory to be tested by alternately application of the two nonreturn to zero waveforms at the memory to be tested, and by a logical comparison of a response signal read out from the memory to be tested with an anticipated value pattern signal.
展开▼