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Frequency multiplier in which the multiplication ratio in the first stage is greater than in the subsequent stages

机译:第一阶段的倍频比大于第二阶段的倍频

摘要

A frequency multiplying circuit comprises a plurality of frequency multipliers (27, 28) in a series array. The multiplying ratio of the initial stage frequency multiplier (27) is the greatest compared with the remaining frequency multiplier or multiptiers. Further, at least one of the frequency multipliers uses a voltage controlled delay circuit. IMAGE IMAGE
机译:倍频电路包括串联阵列中的多个倍频器(27、28)。与剩余的一个或多个倍频器相比,初始倍频器(27)的倍频比最大。此外,至少一个倍频器使用压控延迟电路。 <图像> <图像>

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