A method and apparatus of eliminating the unwanted effects of parasitic bipolar discharge in dynamic logic circuits including silicon-on-insulator (SOI) field effect transistors (FET) by measuring setup time in a logic partition of a dynamic logic circuit having a precharging device and an output device. The method determines a first time delay of a clock signal from said logic partition to a control input of said precharging device and a second time delay of a logic signal from said logic partition to a control input of said output device. The method then determines a setup time according to said first and second time delays. The precharging device remains active during the setup time to prevent parasitic bipolar discharge.
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