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Bi-directional buffers and supplemental logic and interconnect cells for programmable logic devices

机译:双向缓冲器和补充逻辑以及用于可编程逻辑器件的互连单元

摘要

The bi-directional (BI-DI) buffers and supplemental logic and interconnect (SLIC) cells are designed to be programmed to operate in different modes in order to implement different kinds of logic circuits. In particular, BI-DI buffers of the present invention support at least five different operational modes. In a first mode (Mode A), the BI-DI buffer generates a logic "1" output, for any input value. In a second mode (Mode B), the BI-DI buffer generates a logic "0" output, for any input value. In a third mode (Mode C), the BI-DI buffer buffers the input signal and generates an output signal equal to the input signal. In a fourth mode (Mode D), the BI-DI buffer buffers the input signal and generates an output signal equal to the inverse of the input signal. In a fifth mode, (Mode E), the BI-DI buffer operates as a conventional tri- state driver. Two or more of the BI-DI buffers can be configured to form more complex logic circuits having two or more inputs. For example, groups of BI-DI buffers can be configured as SLIC cells that are part of the basic logic cells for an FPGA. When used in FPGAs, the BI-DI buffers and SLIC cells make implementation of different kinds of logic circuits more efficient than is the case for conventional FPGAs, including logic circuits like decoders and state machines that have large numbers of inputs. At the same time, the FPGAs retain their efficiencies for implementing logic circuits for which FPGAs have traditionally been very efficient, such as random logic and datapath logic.
机译:双向(BI-DI)缓冲区以及补充逻辑和互连(SLIC)单元被设计为可在不同模式下运行,以实现不同种类的逻辑电路。特别地,本发明的BI-DI缓冲器支持至少五个不同的操作模式。在第一模式(模式A)中,BI-DI缓冲区针对任何输入值生成逻辑“ 1”输出。在第二种模式(模式B)中,BI-DI缓冲区针对任何输入值生成逻辑“ 0”输出。在第三种模式(模式C)下,BI-DI缓冲器缓冲输入信号并生成等于输入信号的输出信号。在第四模式(模式D)中,BI-DI缓冲器缓冲输入信号并生成等于输入信号反相的输出信号。在第五种模式(模式E)中,BI-DI缓冲区用作常规的三态驱动器。可以将两个或多个BI-DI缓冲器配置为形成具有两个或多个输入的更复杂的逻辑电路。例如,可以将BI-DI缓冲区组配置为SLIC单元,这些SLIC单元是FPGA基本逻辑单元的一部分。当用在FPGA中时,BI-DI缓冲器和SLIC单元使各种逻辑电路的实现比常规FPGA更为有效,传统的FPGA包括解码器和状态机等具有大量输入的逻辑电路。同时,FPGA保留了其效率,以实现传统上非常高效的逻辑电路,例如随机逻辑和数据路径逻辑。

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