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System for generating block address by replacing second count with second valid block address whenever sync is detected or symbol count is reached in one complete block
System for generating block address by replacing second count with second valid block address whenever sync is detected or symbol count is reached in one complete block
For serially transmitted block data that includes a sync signal, ID code, block address code, error correction code, and object data, a data receiving apparatus uses an input data reader that detects the sync signal, checks for parity errors and stores the block address, a sync signal generator that creates an effective sync signal in case the actual signal is not detected, and a block address output generator which provides the appropriate block address for data storage in memory. For data that includes only a sync signal and object data, a receiving apparatus uses a sync signal detector to detect the incoming sync signal, a sync signal generator to create an effective sync signal, a controller and sync signal selector to choose the appropriate signal, and block address and writing address counters to generate addresses for data storage in memory. In both implementations, the normal redundancy of the effective sync signals prevents data from being lost due to undetected sync signals and also minimizes unused memory storage areas in the case of discontinuous incoming block addresses (i.e. track jump). For serial data without a sync signal but having a predetermined number of bytes in every block, an apparatus uses a sync signal generator which detects the block dividing signal between data blocks, a latch signal generator and data latch which capture the transmitted data and convert it to parallel data, and an address generator which generates the memory storage addresses for the parallel data.
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