首页> 外国专利> System for generating block address by replacing second count with second valid block address whenever sync is detected or symbol count is reached in one complete block

System for generating block address by replacing second count with second valid block address whenever sync is detected or symbol count is reached in one complete block

机译:通过在每一个完整块中检测到同步或达到符号计数时,用第二个有效块地址替换第二个计数来生成块地址的系统

摘要

For serially transmitted block data that includes a sync signal, ID code, block address code, error correction code, and object data, a data receiving apparatus uses an input data reader that detects the sync signal, checks for parity errors and stores the block address, a sync signal generator that creates an effective sync signal in case the actual signal is not detected, and a block address output generator which provides the appropriate block address for data storage in memory. For data that includes only a sync signal and object data, a receiving apparatus uses a sync signal detector to detect the incoming sync signal, a sync signal generator to create an effective sync signal, a controller and sync signal selector to choose the appropriate signal, and block address and writing address counters to generate addresses for data storage in memory. In both implementations, the normal redundancy of the effective sync signals prevents data from being lost due to undetected sync signals and also minimizes unused memory storage areas in the case of discontinuous incoming block addresses (i.e. track jump). For serial data without a sync signal but having a predetermined number of bytes in every block, an apparatus uses a sync signal generator which detects the block dividing signal between data blocks, a latch signal generator and data latch which capture the transmitted data and convert it to parallel data, and an address generator which generates the memory storage addresses for the parallel data.
机译:对于包括同步信号,ID码,块地址码,纠错码和目标数据的串行发送的块数据,数据接收设备使用输入数据读取器来检测同步信号,检查奇偶校验错误并存储块地址。 ,一个同步信号发生器,在未检测到实际信号的情况下会产生有效的同步信号;以及一个块地址输出发生器,它为存储在存储器中的数据提供适当的块地址。对于仅包含同步信号和对象数据的数据,接收设备使用同步信号检测器来检测输入的同步信号,使用同步信号生成器来创建有效的同步信号,使用控制器和同步信号选择器来选择合适的信号,并通过块地址和写入地址计数器来生成地址,以将数据存储在内存中。在两种实现方式中,有效同步信号的正常冗余防止了由于未检测到的同步信号而导致的数据丢失,并且在不连续的进入块地址(即,磁道跳变)的情况下还最小化了未使用的存储器存储区域。对于没有同步信号但每个块中具有预定字节数的串行数据,设备使用同步信号发生器来检测数据块之间的块划分信号,锁存信号发生器和数据锁存器,它们捕获所传输的数据并将其转换地址转换为并行数据,地址生成器为并行数据生成存储器存储地址。

著录项

  • 公开/公告号US6029208A

    专利类型

  • 公开/公告日2000-02-22

    原文格式PDF

  • 申请/专利权人 SAMSUNG ELECTRONICS CO. LTD.;

    申请/专利号US19970947848

  • 发明设计人 YOUNG-CHUL KIM;

    申请日1997-10-09

  • 分类号G06F13/38;G06F11/00;

  • 国家 US

  • 入库时间 2022-08-22 01:37:46

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