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Hierarchical dual bus architecture for use in an electronic switching system employing a distributed control architecture
Hierarchical dual bus architecture for use in an electronic switching system employing a distributed control architecture
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机译:用于采用分布式控制体系结构的电子交换系统中的分层双总线体系结构
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摘要
A bus architecture for use in a data communication system provides a communication path between processors and one or more external devices including (M+1) hierarchical processors. Each of the processors is categorized into one of N hierarchies with M and N being a positive integer larger than 1, respectively, and N is smaller than (M+1). The bus architecture includes a bus having N buses, each of the buses coupled to one or more processors of a hierarchy and (N-1) linking means, and each of the linking means for coupling a bus of a hierarchy to a bus of a next hierarchy.
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