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Automated design method and system for synthesizing digital multipliers

机译:合成数字乘法器的自动化设计方法和系统

摘要

A computer-based method and system is disclosed that automates the design and layout of digital multiplier circuits. The preferred method utilizes an automatic design generator having a user interface which receives design requirements for a digital multiplier circuit design. A digital multiplier design generator receives the design requirements for the digital multiplier and retrieves relevant component implementations from a component library. Stored digital multiplier benchmarks are then retrieved from a benchmark memory and applied to corresponding digital multipliers to determine which of the various implementations optimally satisfies the user design requirements. Once the optimal digital multiplier implementation is selected, the digital multiplier design generator produces a logic design including a netlist and a physical design including design directives which are then used to place and route the digital multiplier as a finished layout. Once the layout is completed, the finished layout simulation results are then evaluated against the benchmark results to determine if the actual implementation meets the user requirements. If the user requirements are not met by the actual implementation, then information for generating another implementation is fed back to the digital multiplier design generator.
机译:公开了一种基于计算机的方法和系统,其使数字乘法器电路的设计和布局自动化。该优选方法利用具有用户界面的自动设计生成器,该用户界面接收数字乘法器电路设计的设计要求。数字乘法器设计生成器接收数字乘法器的设计要求,并从组件库中检索相关的组件实现。然后,从基准内存中检索存储的数字乘法器基准,并将其应用于相应的数字乘法器,以确定各种实现方式中的哪一种最能满足用户设计要求。一旦选择了最佳的数字乘法器实施方案,数字乘法器设计生成器就会生成包括网表的逻辑设计和包含设计指令的物理设计,然后将这些设计指令用作最终布局来放置和路由数字乘法器。布局完成后,将根据基准测试结果评估完成的布局模拟结果,以确定实际实现是否满足用户要求。如果实际实现未满足用户要求,则将用于生成另一种实现的信息反馈到数字乘法器设计生成器。

著录项

  • 公开/公告号US6066178A

    专利类型

  • 公开/公告日2000-05-23

    原文格式PDF

  • 申请/专利权人 LSI LOGIC CORPORATION;

    申请/专利号US19960630257

  • 发明设计人 OWEN S. BAIR;FANG-HSING CHEN;

    申请日1996-04-10

  • 分类号G06F17/50;

  • 国家 US

  • 入库时间 2022-08-22 01:37:08

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