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Method for implementing priority encoders using FPGA carry logic
Method for implementing priority encoders using FPGA carry logic
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机译:利用FPGA进位逻辑实现优先编码器的方法
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摘要
The invention provides a method for implementing an HDL- specified priority encoder as carry logic in an FPGA. A first embodiment of the method includes the steps of: 1) detecting an priority determination statement in the HDL code; 2) implementing the highest priority test in the statement using a first carry multiplexer; and 3) implementing the next highest priority test in the statement using another carry multiplexer that accepts the output of the preceding carry multiplexer as a carry input; and 4) repeating step 3 until each test in the statement has been implemented. Another embodiment of the invention includes the additional steps of: 1) counting the number of tests performed in the priority determination statement; and 2) comparing the number of tests to a set threshold criterion, to determine whether it is appropriate to implement the statement using carry logic.
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