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Chemical mechanical polish (CMP) planarizing trench fill method employing composite trench fill layer

机译:使用复合沟槽填充层的化学机械抛光(CMP)平坦化沟槽填充方法

摘要

A method for forming a planarized trench fill layer within a trench within a substrate. There is first provided a substrate having a trench formed therein. There is then formed over the substrate and at least partially filling the trench a first trench fill layer formed employing a high density plasma chemical vapor deposition (HDP-CVD) method. There is then formed upon the first trench fill layer a second trench fill layer formed employing a subatmospheric pressure thermal chemical vapor deposition (SACVD) method employing ozone as an oxidant source material and tetraethylorthosilicate (TEOS) as a silicon source material. Finally, there is then planarized by employing a chemical mechanical polish (CMP) planarizing method the second trench fill layer and the first trench fill layer to form a patterned planarized trench fill layer within the trench. When employing the method, the first trench fill layer is formed to a first thickness and the second trench fill layer is formed to a second thickness, where the first thickness and the second thickness are chosen such that there is attenuated erosion of the substrate when forming the patterned planarized trench fill layer within the trench while employing the chemical mechanical polish (CMP) planarizing method. The method is particularly useful for forming patterned planarized trench fill dielectric layers within isolation trenches within semiconductor substrates employed within semiconductor integrated circuit microelectronics fabrications.
机译:一种在衬底内的沟槽内形成平坦化的沟槽填充层的方法。首先提供具有在其中形成沟槽的衬底。然后在衬底上方形成并且至少部分地填充沟槽,该第一沟槽填充层采用高密度等离子体化学气相沉积(HDP-CVD)方法形成。然后,在第一沟槽填充层上形成第二沟槽填充层,该第二沟槽填充层采用低于大气压的热化学气相沉积(SACVD)方法形成,该方法采用臭氧作为氧化剂源材料并且原硅酸四乙酯(TEOS)作为硅源材料。最后,然后通过使用化学机械抛光(CMP)平坦化方法来平坦化第二沟槽填充层和第一沟槽填充层,以在沟槽内形成图案化的平坦化沟槽填充层。当采用该方法时,将第一沟槽填充层形成为第一厚度,并且将第二沟槽填充层形成为第二厚度,其中选择第一厚度和第二厚度以使得在形成时对基板的衰减腐蚀减小。在采用化学机械抛光(CMP)平坦化方法的同时,在沟槽内形成图案化的平坦化沟槽填充层。该方法对于在半导体集成电路微电子制造中采用的半导体衬底内的隔离沟槽内形成图案化的平坦化沟槽填充电介质层特别有用。

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