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Method and apparatus for detecting and correcting anomalies in field- programmable gate arrays using CRCs for anomaly detection and parity for anomaly correction
Method and apparatus for detecting and correcting anomalies in field- programmable gate arrays using CRCs for anomaly detection and parity for anomaly correction
A method and means for detecting and correcting anomalies in a RAM- based FPGA by comparing CRC residues over portions of the RAM-stored connection bitmap with prestored residues derived from uncorrupted copies of the same bitmap portions. A mismatch selectively invokes either error reporting to the chip only, error reporting and immediate verification testing of counterpart FPGA chip functions, or error reporting, parity- based correction of the words in error, reprogramming of the chip functions with the corrected words, and verification testing.
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