Memory system, method for verifying data stored in a memory system after a write cycle and method for writing to a memory system

摘要

A memory system (20) comprising a memory array (22) having a plurality of memory cells (42) arranged in rows and columns. Each memory cell (42) has a control terminal. A voltage controller (26) provides to the control terminal of a memory cell a first verify voltage signal (Vabse) during a first verify cycle or a second verify voltage signal (Vabsp) during a second verify cycle. The first verify voltage signal (Vabse) having a predetermined voltage level that corresponds substantially to a threshold voltage level of a memory cell in the array in a first state and the second verify voltage signal (Vabsp) having a predetermined voltage level that corresponds substantially to a threshold voltage level of a memory cell in the array in a second state.