Signal comparison system and method for improving data analysis by determining transitions of a data signal with respect to a clock signal

摘要

A signal comparison system determines whether a data signal is transitioning close to transitions of its clock signal, thereby causing possible errors in the sampling of the data signal. A first latch latches a data value of the data signal based on the transition of the clock signal. A delay mechanism delays the clock signal so that a second latch receives a delayed transition of the clock signal. The amount of delay corresponds to an amount of time to allow at least the data value latched into the first latch to stabilize. The second latch latches a data value of the data signal based on the delayed transition of the clock signal. A comparison mechanism compares the values of the two latches and outputs a particular logical value when the two values differ. The particular logical value indicates that the data signal transitioned so close to the clock signal that the data value of the first latch may be unreliable. Control logic increases a delay of the data signal until the particular logical value is detected. The control logic then decreases the delay of the data signal until the particular logical value is again detected. By setting the delay of the data signal to a position in the middle of the two delays that result in a detection of the particular logical value, more reliable communication is established by minimizing timing errors associated with the data signal transitioning close to transitions of the clock signal.