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Method and apparatus for handling system management interrupts (SMI) as well as, ordinary interrupts of peripherals such as PCMCIA cards

机译:处理系统管理中断(SMI)以及外围设备的普通中断(例如PCMCIA卡)的方法和设备

摘要

An electronic system (100) includes a first integrated circuit (IC) (112) having a card system management interrupt (SMI) output pin (CRDSMI#) and interrupt pins (IRQ3-5), and a logic circuit (1620, 1630) having an output connected to the card SMI pin. This logic circuit further has inputs connected to a first and second set of registers and logic for first and second cards (CARD A,B) respectively. Each of the first and second sets of registers and logic include a first register (CSC REG) having bits set by at least a card event (CDCHG) and a battery condition event (BWARN) respectively. A logic gate (2672) responds to combine the bits from the first register. A second register (INT AND GEN CTRL REG) has a bit (SMIEN) for steering the output of the logic gate (2672) for ordinary interrupt or for system management interrupt purposes depending on the state of the bit (SMIEN). A second integrated circuit (110) has a system management interrupt (SMI#) output pin and SMI circuitry (2370) including a SMI register (2610) connected to events sources eligible for SMI response including the card SMI output of the first integrated circuit. This second IC (110) further has a mask SMI register (2620) connected to the SMI register (2610) to select particular ones of the events sources for SMI response. A logic circuit (2634, 2638) is fed by the SMI register (2610) for combining the selected events sources to supply an internal SMI output (SMIOUT). Other circuits, systems and methods are also disclosed.
机译:电子系统(100)包括具有卡系统管理中断(SMI)输出引脚(CRDSMI#)和中断引脚(IRQ3-5)的第一集成电路(IC)(112)和逻辑电路(1620、1630)输出连接到卡的SMI引脚。该逻辑电路还具有连接到第一和第二组寄存器的输入以及分别用于第一和第二卡(CARD A,B)的逻辑。第一组和第二组寄存器和逻辑中的每一个都包括第一寄存器(CSC REG),其具有分别由至少卡事件(CDCHG)和电池状况事件(BWARN)设置的位。逻辑门(2672)响应以组合来自第一寄存器的位。第二寄存器(INT和GEN CTRL REG)具有位(SMIEN),用于根据该位的状态(SMIEN)来控制逻辑门(2672)的输出以用于普通中断或用于系统管理中断目的。第二集成电路(110)具有系统管理中断(SMI#)输出引脚和包括SMI寄存器(2610)的SMI电路(2370),所述SMI寄存器(2610)连接到适合于SMI响应的事件源,所述事件源包括第一集成电路的卡SMI输出。该第二IC(110)还具有连接到SMI寄存器(2610)的屏蔽SMI寄存器(2620),以选择用于SMI响应的特定事件源。逻辑电路(2634、2638)由SMI寄存器(2610)馈送,用于组合所选择的事件源以提供内部SMI输出(SMIOUT)。还公开了其他电路,系统和方法。

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