首页> 外国专利> How to select a non-blocking load from the load / store buffer and load / store unit to achieve a non-blocking load for a superscalar microprocessor

How to select a non-blocking load from the load / store buffer and load / store unit to achieve a non-blocking load for a superscalar microprocessor

机译:如何从加载/存储缓冲区和加载/存储单元中选择无阻塞负载,以实现超标量微处理器的无阻塞负载

摘要

Load / store buffer that can store both (57) of the store memory operation and the load SUMMARY memory operation is provided. Memory operations to access the data cache is selected from the load / store buffer, which a memory operation that the order of the program, the memory operation is selected, misses the data cache is stored in the buffer and known including the case in which after. Thus, memory operations other waiting an opportunity to access the data cache and waits for the opportunity to perform a main memory request to the memory operation that can be performed to such access, missed. Memory operations that miss is indicated by Misubitto which is set, a mechanism for selecting a memory operation accessing the data cache, to allow ignore them until they become non-speculative therefore.
机译:提供了可以同时存储(57)存储存储操作和加载摘要存储操作的加载/存储缓冲区。从加载/存储缓冲区中选择用于访问数据缓存的内存操作,其中程序的顺序,内存操作被选择,未命中数据缓存的内存操作被存储在缓冲区中并且已知包括以下情况: 。因此,错过了其他等待机会访问数据高速缓存并等待机会执行对可以对该访问执行的存储操作的主存储请求的机会的存储器操作。未设置的内存操作由Misubitto指示,该设置被设置为一种机制,用于选择访问数据高速缓存的内存操作,从而允许忽略它们,直到它们成为非推测性为止。

著录项

相似文献

  • 专利
  • 外文文献
  • 中文文献
获取专利

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号