An adaptive equaliser provides different degrees of high frequency boost to the received signal, while retaining a relatively constant phase shift for each boost setting. The response of equaliser is controlled by a control circuit (e.g., a digital signal processor) to compensate for the high frequency signal attenuation primarily caused by the signal path. For example, the signal path, may include a telephone line between the communications system (e.g., a modem) and the central office. The dynamic response of the equaliser is selected based upon the characteristics of the signal path, which the receive signal travels along. The equaliser may receive single ended or doubled ended signals. Advantageously, the equaliser conditions the received signal to ensure efficient utilization of the dynamic range of the ADC located in the reception path. The equaliser is suitable for on-chip implementation, resulting in lower cost and power consumption.
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